A pipelining parallelism extraction technique considering machine resources.

Accession number;99A0182299
Title;A pipelining parallelism extraction technique considering machine resources.
Author; YUDA MASATO (Waseda Univ., Sch. of Sci. & Eng.) KOSEKI AKIRA (IBM Japan Ltd., Tokyo Res. Lab. Comp. Sci. Inst.) KOMATSU HIDEAKI (IBM Japan Ltd., Tokyo Res. Lab. Comp. Sci. Inst.) FUKAZAWA YOSHIAKI (Waseda Univ., Sch. of Sci. & Eng.)
Journal Title;Joho Shori Gakkai Kenkyu Hokoku
Journal Code:Z0031B
ISSN:0919-6072
VOL.98;NO.115(HPC-74);PAGE.71-76(1998)
Figure&Table&Reference;FIG.4, TBL.2, REF.9
Pub. Country;Japan
Language;Japanese
Abstract;In this paper, we describe a new instruction clustering algorithm for Loop Staging, which is one of fine-grain loop parallelization techniques. By this time, in Loop Staging, instructions have been clustered by prioritizing program dependences that become the communication cost between processors, which deteriorate the performance of parallel execution when applying existing iteration clustering methods. However, in practice, a large performance-up can't be achieved because of time for communication between processors and for controlling cache. In this method, we consider time for communication between processors and for controlling cache when we partition instructions in different processors as a 'cost', and propose a new clustering algorithm using this cost as a parameter of evaluating function of instruction clustering. (author abst.)