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Accession number;99A0938092
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| Title;Research on Binary-Multivalued-Analog Merged Processor Using Neuron-MOS Technology. |
| Author;
YU N
(Tohoku Univ.)
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Journal Title;Record of Electrical and Communication Engineering Conversazione, Tohoku University
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Journal Code:F0511A
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ISSN:0385-7719
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VOL.68;NO.1;PAGE.105-107(1999)
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| Figure&Table&Reference;FIG.6 |
| Pub. Country;Japan |
| Language;Japanese |
| Abstract;This paper presents a newly-developed neuron-MOS(.NU.MOS) processor that can merged binary-multivalued-analog data. The unique feature of the circuit is that it accepts analog or multivalued inputs without A/D conversion but products binary outputs, thus providing a very smooth interfacing between the real world and digital systems. test circuits have been fabricated by a double-polysilicon/double-metal CMOS process and their operation has been experimentally demonstrated. (author abst.) |
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