Design of DRAM type Multi-context FPGA for Virtual Hardware HOSMII.
|
Accession number;01A0340298
|
| Title;Design of DRAM type Multi-context FPGA for Virtual Hardware HOSMII. |
| Author;
KAWAKAMI DAISUKE
(Keio Univ., Graduate School, JPN)
SHIBATA YUICHIRO
(Keio Univ., Graduate School, JPN)
AMANO HIDEHARU
(Keio Univ., Graduate School, JPN)
|
Journal Title;IEIC Technical Report (Institute of Electronics, Information and Communication Engineers)
|
Journal Code:S0532B
|
ISSN:0913-5685
|
|
VOL.100;NO.533(CPSY2000 66-71);PAGE.1-8(2001)
|
| Figure&Table&Reference;FIG.12, TBL.1, REF.6 |
| Pub. Country;Japan |
| Language;Japanese |
| Abstract;HOSMII is a virtual hardware system with a data driven control mechanism. It uses a multi-context FPGA which provides multiple sets of configuration memory inside the chip. Using FPGA/CPLD embedded with DRAM enables us to keep a lot of configuration memory sets in a chip. Though research prototypes of such a chip have been implemented, these devices are not optimized for HOSMII mechanism. Here, a multicontext DRAM FPGA chip called HOSMII chip is implemented for HOSMII mechanism. HOSMII chip is a 0.35.MU.m standard cell CMOS with metal-3 poly-2 layer. It provides 16 contexts in 4.93mm2. Electric simulation shows the logic block works at 100MHz with 3.3V voltage supply. Also, it takes about 5ns to reconfigure the whole circuits. (author abst.) |
|
|
|
Related Articles;
|
|
