Development of Low-Cost, Highly Reliable CSP Using Gold-Gold Interconnection Technology
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Accession number;03A0296571
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| Title;Development of Low-Cost, Highly Reliable CSP Using Gold-Gold Interconnection Technology |
| Author;
ISOZAKI S
(Nec Electronics Corp.)
KIMURA T
(Nec Electronics Corp.)
SHIMADA T
(Smci Globetronics Technol. Ind. Sdn Bhd)
NAKAJIMA H
(Nec Electronics Corp.)
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Journal Title;NEC Res Dev
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Journal Code:G0138A
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ISSN:0547-051X
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VOL.44;NO.2;PAGE.181-187(2003)
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| Figure&Table&Reference;FIG.15, TBL.5, REF.4 |
| Pub. Country;Japan |
| Language;English |
| Abstract;A low-cost, highly reliable CSP (Chip Size Package), named T-G2BGA (Tape Gold-Gold gang bond BGA), has been developed for compact and light package. T-G2BGA has a structure that connects a chip and an interposer using gold-gold interconnection technology, which uses thermo-compression flip chip bonding. We studied ways to interconnect gold stud bumps on chip and gold plated pads on tape metallurgically and succeeded in realizing a highly reliable package. T-G2BGA can realize fan-in type, real chip size, package, and fan-out type package. For the fan-out type, sidefill resin or support ring is formed on overhang tape for solder ball coplanarity. Using TEG (Test Element Group) samples, we selected the most suitable materials and optimized flip chip bonding conditions. Consequently, a 60pin fan-in type package was fabricated under optimized conditions using selected materials and memory device, and good reliability test results were obtained. On the other hand, a 60pin fan-out type package was fabricated with optimized sidefill resin, which showed good solder ball coplanarity and solder joint reliability. The gold stud bumps and gold pads interconnection technology is considered to be low in cost, highly reliable and more suitable for CSP. (author abst.) |
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