LRU-based Global Replacement Algorithm for Non-uniform Shared Cache of Multi-core Processors
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Accession number;07A0176827
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| Title;LRU-based Global Replacement Algorithm for Non-uniform Shared Cache of Multi-core Processors |
| Author;
SHIOYA RYOTA
(Graduate School of Information Sci. and Technol., Univ. Tokyo, JPN)
HUNG LUONG DINH
(Graduate School of Information Sci. and Technol., Univ. Tokyo, JPN)
IRIE HIDETSUGU
(Japan Sci. and Technol. Agency, JPN(JST))
GOSHIMA MASAHIRO
(Graduate School of Information Sci. and Technol., Univ. Tokyo, JPN)
SAKAI SHUICHI
(Graduate School of Information Sci. and Technol., Univ. Tokyo, JPN)
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Journal Title;IPSJ Transactions on Database
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Journal Code:Z0778A
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ISSN:0387-5806
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VOL.48;NO.SIG3(ACS17);PAGE.59-74(2007)
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| Figure&Table&Reference;FIG.19, TBL.6, REF.11 |
| Pub. Country;Japan |
| Language;Japanese |
| Abstract;In this paper, we propose LRU-based global replacement algorithm for Non-Uniform Shared Cache of multi-core processors. Multi-core processor allows fast communication between processors because the cores are in the same chip. Therefore, the caches, independently placed in each core, can be referenced by each other with low latency. We call such a cache sharing structure Non-Uniform Shared Cache. We describe a replacement algorithm of cache-lines based on a global LRU information in Non-Uniform Shared Cache. This algorithm can use idle line as higher-level cache for the other. Our technique archived performance improvement compared with conventional shared cache by 11%. (author abst.) |
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