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> Int Conf Electron Packag
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Int Conf Electron Packag
2006
What's the Jisso Technology for Next Generation Automotive Electronics
Advanced Semiconductor Packaging Technology
Micro-Mirror Array Fabricated Using Magnetic Alignment
Ceramic Wafer Scale Packaging Technology for MEMS Devices
STP Technology for MEMS Devices Packaging
Self-Written Waveguide Optical Pin Fabricated Using Photomask Transfer Method
Optical Connection Rod on VCSEL using Self-Written Waveguide by Mask-Transfer Process
Yield Based Manufacturing Cost Methodology for Advanced Packaging Technology Comparison
Correct Reflow Machine makes your Process Robust
The Chip-on-Glass Bonding Using Non-conductive Adhesive and Sn bump: Effect of Sn Bump Types on the NCA trapping
Formation of Kirkendall Voids in the Reactive Diffusion between Cu and High-lead Solders
Characteristics of Bonding Process Using Ag Metallo-Organic Nanoparticles
Embedded Chip Build-Up BGA for High-End Processors
Embedded Capacitor Technology on FR-4 Using Aerosol Deposition
Preparation and Evaluation of Embedded Passive Thin Film Capacitor by Using Semiconductor Technology
Process Development and Surface Characterization on Liquid Crystalline Polymer Substrate Based System on Package with Chip Embedded for Electronic Application
Embedding Discrete Components into Organic Substrates
Development of Embedded Organic Module Technology
Thin film embedded passive technology for system integration
Development of the Embedded Passive Substrate and High Frequency Characteristics
Newly Developed Solvent-Casting Type LCP Film Suitable for PCB Applications
Reworkable Underfill which Yield Plastic Flow before Cure
Filler Size Effect of Underfill in Flip-chip Package
Thermal Characteristics and Morphology of Semi-conducting Poly(9,9'-dioctylfluorene-co-bithiophene) Film
Paradigm shift for PWB surface finishes in mobile phone terminals.
Estimate of Drop Impact Reliability for BGA Solder Joints
Open Lead Detection Based on Supply Current of CMOS Logic Circuits by AC Voltage Signal Application
Reliability of Gold-Solder bump joint
Enhanced Packaged Transistor Modelling for 24GHz LTCC Applications
RF Benchmarking of LTCC Circuits up to 40GHz
Dielectric constant analysis of low temperature co-fired ceramic substrates in GHz range
The Development of Surface Mount Package with Differential Transmission Lines for 40Gb/s Applications
On the Local Skew Effect on the Electrical Performance of Differential Via Structures in a Multilayer PCB
A Vertical Transition for Packaged Transistors on LTCC Substrates for 24GHz Applications
A Study on Magnetic Field Measurements by a High-Frequency-Carrier Type Magnetic Probe
Viscoelastic FEM Simulation of an Underfill Resin for the Reliability Evaluation of Solder Bumps in a Flip Chip Package
Thermal Resistance Analysis on Semiconductor Packages Using Two Mesh Models
Reduction of Power Dissipation in Full Adder using Adiabatic Method
Study of Impact Stress of CSP Solder Joints using Homogenization Method and FEM Drop-Simulation
Ultimate Super-Chip Integration Based on Chip-to-Wafer Three-Dimensional Integration Technology
Signal Integrity Between DSP and Memory in 3D Packages for Mobile Phone
A Study of Package Flatness During Solder Reflow for Package-on-Package
LC-VCO with Wafer level-CSP technology
Silicon Through Hole Technology
Impact and Opportunities of Through Silicon Via and Three-Dimensional Chip Stacking
Room Temperature Bonding Between Stacked Chips Formed Si Through-hole Electrodes
Through-Hole Interconnection Technologies in Si Substrate for Wafer Level Package
Silicon Through Interconnection Technology for System Integration
Impact reliabilities of lead-free solder joints with Ni(P), Cu and Ni metallizations
Intermetallic compound formation between Sn and Cu or Ni
Formation of Intermetallic Compound at Sn-Zn-Bi-In-P Lead-free Solder/Cu Interface
Reliability of Sn/Pb, Sn/Pb/Ag, Sn/Ag/Cu and Sn/Cu/Ni Solder Joints in Cyclic Mechanical Loading
Investigation of Whisker Formation on Tin Plating
Consequential Toxicity Assessment of the Global Shift to Pb-free Solder Paste
Analysis of Corrective Action's Quality provided to Customers with Mobile Terminals using Self-Organizing Maps
Is the Productization of a Mobile Terminal Coming More Demanding?
Bumpless Interconnect of Cu Electrodes in Millions-Pins Level
Low Temperature Surface Activated Flip Chip Technique on Cu-Cu Interconnection in Chip-On-Flex System
Low Temperature Bonding of Sn-Ag-Cu Solder Bumps by SAB Method
Application of SAB on Cu/LCP Laminate
Application of SAB on Wafer Bonding at Room Temperature
Surface Activated Bonding Method for Ionic Wafers at Low Temperature
Application of SAB on MEMS Packaging
Halogen Free Material Having Low Transmission Loss Designed for Multi-layer Printed Circuit Board Applications
The Fuzzy Approach to an Estimation of Condition of Film Resistors and Hybrid Integrated Circuits
Development of High-Density Multilayer Flexible Printed Circuits
In-situ Charge Observation in Insulation Layers of Printed Circuit Boards During Ageing Tests
Development of Halogen-Free Prepreg Available for Additive Manufacturing Process
A New Fine Patterning Method for LTCC Electrode Used with Photo-Patterned Dry Film
The Effect of Al2O3 Particles Size on Tape Casting Properties of LTCC System of Al2O3 and Borosilicate Glass
Development of LTCC (Low Temperature Co-fired Ceramics) Materials with High Mechanical Strength
LTCC multi-layer Substrate Utilized with Ink-jet Printed Silver Layers and UV Laser Drilled Micro Via
On-chip/Off-chip High Density Transmission Line Interconnect
Current status and future outlook of SAB technology
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